
Engineering
Memory and Context: the unidirectional rule that holds it together
Memory → Context, never the reverse. Four design rules (D1–D4) from cross-validating 12 production implementations — and the failure mode each one prevents.

Engineering
Memory → Context, never the reverse. Four design rules (D1–D4) from cross-validating 12 production implementations — and the failure mode each one prevents.

Engineering
Compacting the whole context at 50% is wasteful. Waiting until 99% triggers Context Rot. The middle path is a five-stage pipeline that stops at the first stage that resolves the pressure.

Engineering
Frontloading every tool schema works up to 10 tools. After that, accuracy collapses. Progressive disclosure inverts the default — Anthropic reports 134K → 8.7K tokens and 49% → 74% accuracy on Opus 4.

Engineering
A memory layer is not just a vector store. The taxonomy that emerges from production implementations and the CoALA paper is five components — Store, Write, Recall, Dream, Auxiliary LLM — and they cooperate in a continuous loop.

Launches
Why we're starting an engineering blog now, what to expect, and how this fits into the larger usetheo story.